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EDA terms

Floorplanning

Floorplanning is typically considered the first stage of VLSI physical design.

  • Given a set of hard blocks (whose shapes cannot be changed) and/or soft blocks (whose shapes can be adjusted) and a netlist,
  • floorplanning determines the shapes of soft blocks and assembles the blocks into a rectangle (chip)
  • so a predefined cost metric (such as the chip area, wire length, wire congestion) is optimized

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Placement

Placement is the process of assigning the circuit components into a chip region. (sounds similar with floorplanning?)

  • Given a set of fixed cells/macros, a netlist, and a chip outline,
  • placement assigns the predesigned cells/macros to positions on the chip
  • so that no two cells/macros overlap with each other (i.e., legalization) and some cost functions (e.g., wire length, congestion, and timing) are optimized

Routing

After placement, routing defines the precise paths for conductors that carry electrical signals on the chip layout to interconnect all pins that are electrically equivalent.

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